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Khatri, Abdul Rafay, Hayek, Ali, B¨orcs¨ok, Josef (2018) Validation of the Proposed Hardness Analysis Technique for FPGA Designs to Improve Reliability and Fault-Tolerance. International Journal of Advanced Computer Science and Applications, 9. doi:10.14569/ijacsa.2018.091201

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Reference TypeJournal (article/letter/editorial)
TitleValidation of the Proposed Hardness Analysis Technique for FPGA Designs to Improve Reliability and Fault-Tolerance
JournalInternational Journal of Advanced Computer Science and Applications
AuthorsKhatri, Abdul RafayAuthor
Hayek, AliAuthor
B¨orcs¨ok, JosefAuthor
Year2018Volume9
PublisherThe Science and Information Organization
DOIdoi:10.14569/ijacsa.2018.091201Search in ResearchGate
Generate Citation Formats
Mindat Ref. ID10372222Long-form Identifiermindat:1:5:10372222:3
GUID0
Full ReferenceKhatri, Abdul Rafay, Hayek, Ali, B¨orcs¨ok, Josef (2018) Validation of the Proposed Hardness Analysis Technique for FPGA Designs to Improve Reliability and Fault-Tolerance. International Journal of Advanced Computer Science and Applications, 9. doi:10.14569/ijacsa.2018.091201
Plain TextKhatri, Abdul Rafay, Hayek, Ali, B¨orcs¨ok, Josef (2018) Validation of the Proposed Hardness Analysis Technique for FPGA Designs to Improve Reliability and Fault-Tolerance. International Journal of Advanced Computer Science and Applications, 9. doi:10.14569/ijacsa.2018.091201
In(n.d.) International Journal of Advanced Computer Science and Applications Vol. 9. The Science and Information Organization

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Khatri, Abdul Rafay, Hayek, Ali, Borcsok, Josef (2018) RASP-FIT: A Fast and Automatic Fault Injection Tool for Code-Modification of FPGA Designs. International Journal of Advanced Computer Science and Applications, 9. doi:10.14569/ijacsa.2018.091004
Khatri, Abdul Rafay, Hayek, Ali, Borcsok, Josef (2020) Development and Verification of Serial Fault Simulation for FPGA Designs using the Proposed RASP-FIT Tool. International Journal of Advanced Computer Science and Applications, 11 (8) doi:10.14569/ijacsa.2020.0110805
Khatri, Abdul Rafay, Hayek, Ali, Börcsök, Josef (2019) Fault Injection and Test Approach for Behavioural Verilog Designs using the Proposed RASP-FIT Tool. International Journal of Advanced Computer Science and Applications, 10. doi:10.14569/ijacsa.2019.0100407
Khatri, Abdul Rafay (2020) Overview of Fault Tolerance Techniques and the Proposed TMR Generator Tool for FPGA Designs. International Journal of Advanced Computer Science and Applications, 11 (4) doi:10.14569/ijacsa.2020.0110497
Khatri, Abdul Rafay, Hayek, Ali, Borcsok, Josef (2018) RASP-TMR: An Automatic and Fast Synthesizable Verilog Code Generator Tool for the Implementation and Evaluation of TMR Approach. International Journal of Advanced Computer Science and Applications, 9. doi:10.14569/ijacsa.2018.090875
Khatri, Abdul Rafay (2019) Implementation, Verification and Validation of an OpenRISC-1200 Soft-core Processor on FPGA. International Journal of Advanced Computer Science and Applications, 10. doi:10.14569/ijacsa.2019.0100162
Khatri, Abdul Rafay (2019) A Technical Guide for the RASP-FIT Tool. International Journal of Advanced Computer Science and Applications, 10. doi:10.14569/ijacsa.2019.0101279
Aseeri, Aishah M., A., Mai (2018) A Two-Level Fault-Tolerance Technique for High Performance Computing Applications. International Journal of Advanced Computer Science and Applications, 9. doi:10.14569/ijacsa.2018.091207
BENABDELADHIM, Mohamed, DGHAIS, Wael, ZAYER, Fakhreddine, HAMDI, Belgacem (2018) An Efficient Fault Tolerance Technique for Through-Silicon-Vias in 3-D ICs. International Journal of Advanced Computer Science and Applications, 9. doi:10.14569/ijacsa.2018.090737
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Bonny, Talal (2018) Heterogeneous HW/SW FPGA-Based Embedded System for Database Sequencing Applications. International Journal of Advanced Computer Science and Applications, 9. doi:10.14569/ijacsa.2018.091030
 
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