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Rose, Garrett S., Rajendran, Jeyavijayan, Manem, Harika, Karri, Ramesh, Pino, Robinson E. (2012) Leveraging Memristive Systems in the Construction of Digital Logic Circuits. Proceedings of the IEEE, 100. 2033-2049 doi:10.1109/jproc.2011.2167489

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Reference TypeJournal (article/letter/editorial)
TitleLeveraging Memristive Systems in the Construction of Digital Logic Circuits
JournalProceedings of the IEEE
AuthorsRose, Garrett S.Author
Rajendran, JeyavijayanAuthor
Manem, HarikaAuthor
Karri, RameshAuthor
Pino, Robinson E.Author
Year2012 (June)Volume100
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
DOIdoi:10.1109/jproc.2011.2167489Search in ResearchGate
Generate Citation Formats
Mindat Ref. ID12798862Long-form Identifiermindat:1:5:12798862:9
GUID0
Full ReferenceRose, Garrett S., Rajendran, Jeyavijayan, Manem, Harika, Karri, Ramesh, Pino, Robinson E. (2012) Leveraging Memristive Systems in the Construction of Digital Logic Circuits. Proceedings of the IEEE, 100. 2033-2049 doi:10.1109/jproc.2011.2167489
Plain TextRose, Garrett S., Rajendran, Jeyavijayan, Manem, Harika, Karri, Ramesh, Pino, Robinson E. (2012) Leveraging Memristive Systems in the Construction of Digital Logic Circuits. Proceedings of the IEEE, 100. 2033-2049 doi:10.1109/jproc.2011.2167489
In(2012) Proceedings of the IEEE Vol. 100. Institute of Electrical and Electronics Engineers (IEEE)

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