Reference Type | Journal (article/letter/editorial) |
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Title | Stability Diagrams of Single-Common-Gate Double-Dot Single-Electron Transistors with Arbitrary Junction and Gate Capacitances |
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Journal | Japanese Journal of Applied Physics |
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Authors | Imai, Shigeru | Author |
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Kato, Hiroki | Author |
Hiraoka, Yasuhiro | Author |
Year | 2012 (December 1) | Volume | 51 |
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Issue | 12 |
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Publisher | Japan Society of Applied Physics |
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DOI | doi:10.7567/jjap.51.124301Search in ResearchGate |
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| Generate Citation Formats |
Mindat Ref. ID | 15042008 | Long-form Identifier | mindat:1:5:15042008:0 |
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GUID | 0 |
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Full Reference | Imai, Shigeru, Kato, Hiroki, Hiraoka, Yasuhiro (2012) Stability Diagrams of Single-Common-Gate Double-Dot Single-Electron Transistors with Arbitrary Junction and Gate Capacitances. Japanese Journal of Applied Physics, 51 (12) 124301 doi:10.7567/jjap.51.124301 |
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Plain Text | Imai, Shigeru, Kato, Hiroki, Hiraoka, Yasuhiro (2012) Stability Diagrams of Single-Common-Gate Double-Dot Single-Electron Transistors with Arbitrary Junction and Gate Capacitances. Japanese Journal of Applied Physics, 51 (12) 124301 doi:10.7567/jjap.51.124301 |
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In | (2012, December) Japanese Journal of Applied Physics Vol. 51 (12) Japan Society of Applied Physics |
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